GRENOBLE, France--(BUSINESS WIRE)--Hprobe, a provider of turnkey semiconductor Automatic Test Equipment (ATE) for magnetic devices, today announced a breakthrough magnetic test head revolutionizing ...

Test-flow partitioning between wafer sort and final package test can have a dramatic impact on the cost of test. In some cases, the migration of package tests can be done over time, but the test ...

FREMONT, Calif., May 19, 2011 (GLOBE NEWSWIRE) -- Aehr Test Systems (Nasdaq:AEHR), a worldwide supplier of semiconductor test and burn-in equipment, announced today that it has received over $2 ...

STMicroelectronics, a global semiconductor leader serving customers across the spectrum of electronics applications, announced the successful production of the world’s first semiconductor wafer whose ...

FREMONT, Calif., March 21, 2011 (GLOBE NEWSWIRE) -- Aehr Test Systems (Nasdaq:AEHR), a worldwide supplier of semiconductor test and burn-in equipment, announced today that it has received over $2 ...

Test strategy analysis has become increasingly important for finding ways to reduce test costs for system-on-a-chip (SoC) semiconductor devices. Every SoC device’s test flow is unique and requires a ...

CUPERTINO, Calif.--(BUSINESS WIRE)--Verigy (NASDAQ:VRGY), a premier semiconductor test company, today introduced the V101, a new low-cost, zero-footprint, 100 MHz Tester-on-Board TM system for wafer ...

LONDON—European chip company STMicroelectronics NV has said it has produced the first wafer on which the die were fully tested wirelessly and without the use of contact probes. The EMWS ...

The world’s fastest automated photonic alignment with nine-axis nano-precision, delivering significantly higher throughput compared to other technologies. Full integration of FormFactor’s Velox™ probe ...

TOKYO, Dec. 07, 2023 (GLOBE NEWSWIRE) -- Leading semiconductor test equipment supplier Advantest Corporation (TSE: 6857) today announced three new additions to its suite of memory test products. The ...

The move to multi-die packaging is driving chipmakers to develop more cost-effective ways to ensure only known-good die are integrated into packages, because the price of failure is significantly ...